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| wenshing?? TRW-24G2 low pow er high performance 2 .4 ghz gfsk transceiv er features pi n assignments 2400-2483.5 mhz ism band opera ti on support 1 and 2 mbps air dat a rate prog ra mm ab le output pow er (-40dbm to 5dbm) low po w er consu mp ti on va ri ab le pay load length fr om 1 to 32b yt es auto ma ti c packet p rocessing 6 data pipes for 1:6 st ar ne tw orks 1.9v to 3.6 v po w er supply 4-pin spi in te rf ace w it h max imu m 8 mhz clock rate co mpact 20-p in 4x4 mm qfn package a pp li catio ns w ir eless pc per ip herals w ir eles s mice and key board s w ir eless gamepad s w ir eless audio voip an d wireless he ad sets re mo te con tr o ls consum er el ec tr oni cs home auto ma ti on to y s personal hea lt h an d ente rt ain ment wenshing confidential do not distribution
http://www.wenshing.com.tw;http://www.rf.net.tw p . 2 table of contents 1 gene ra l descrip tion ............................... ....................................................... ... ......... . .. .............. 3 2 abbrevi at io ns .............................. ................................................................ ...................... .. ...... 4 3 pin i nf orm at io n .............................. ................................................................ .................. ......... 5 4 st ate co nt ro l .............................. ................................ ................................. .............................. 6 4.1 s t a t e cont r ol d i ag r am .............................................................................................. . . . . ... .........6 4.2 po w er d o w n mo d e .................................................................................................... ......... . .... 7 4.3 s t andb y - i mode ............................... . ....................................................................... . ...... . ......... 7 4.4 s t andb y - i i mod e ............................... . ..................................................................... . ......... ... ..... 7 4.5 tx mode ............................... . ............................................................................... . ...... .. ...... . ... 7 4.6 rx mode ............................... . .............................................................................. . ........... .... . ... 8 5 p a c k et pr o c e ss ing .............................. . ............................... . ................................ . . . ....... .... ...... ... 8 5.1 p a cket f o r m at ............................... . .................................................... ............................... ........ 8 5.1.1 preamb le ............................... ........................................................................................... 9 5.1.2 add ress ............................... ............................................................................................. 9 5.1.3 packet con tr ol ................................................................................................................. 9 5.1.4 pay load ............................... ............................................................................................ 10 5.1.5 crc ............................... ................................................................................................. 10 5.2 packet hand li ng ...................................................................................................................... 10 6 d at a a nd co nt ro l interfa ce .............................................................................................. ....... .. 11 6.1 tx/ rx fifo ............................... ............................................................................................ 11 6.2 inte rr upt ............................................................................................................................... .... 11 6.3 spi in te rf ace ............................................................................................................................ 12 6.3.1 spi co mmand ................................................................................................................ 12 6.3.2 spi ti ming ............................... ...................................................................................... .13 7 re gist er ma p ....................................................................................................................... ...... 15 7.1 regist er bank 0 ....................................................................................................................... .15 7.2 regist er bank 1 ............................... ........................................................................................ .20 8 electrical specif ic at io ns ......................................................................................................... .... 21 9 typical ap pl ic at ion schemat ic ............................... ............................... ............................... .. .... 22 wenshing confidential do not distribution http://www.wenshing.com.tw;http://www.rf.net.tw p . 3 s p i i n te r f a c e r e g i s t e r b a n k s 1 general des cr i pt io n TRW-24G2 is a gfsk tr an s ce iv er opera ti ng in the wo rl d wi de i sm fr equency band at 2400- 2483.5 mh z. bu rst mode tr an smis si on an d up to 2mbps air data rate make them su it ab le for app lica ti ons requiring u ltra low po w er consump ti on. the embedded pack et processing engines enable their fu ll opera ti on with a v ery simp le mcu as a r ad io sy stem . auto re- tr an smis si on and au to acknowl ed g e give re li ab le li nk without any mcu in te rf erence. TRW-24G2 operat es in td d mode, e it her as a tr an smi tter or as a rece iv er. the rf channel fr equency determines the cent er of the channel used b y TRW-24G2. the fr equency is set by the rf_ch r eg ist er in r eg ist er bank 0 according to the fo ll owing fo rmula: f0= 2400 + rf_c h (mhz) . the reso lu ti on of the rf ch annel fr equency is 1mhz. a tr an smitter and a re ce iv er must be p rogramm ed with the same rf channel fr equency t o be ab l e to co mmuni ca t e with each other. the outp ut power of TRW-24G2 is set by the rf_ pwr b it s in the rf_setup register. demodula ti on is done with embedded dat a slicer and bit recov er y logic. the air data rat e can be p rogra mm ed to 1mbps or 2mbps by rf_ dr r eg ister. a tr an smitter and a rece iv er must be programmed w it h th e sam e se tti ng. in the fo llowi ng chapter s, al l r eg isters are in r eg ist er bank 0 except with exp li cit claim. rf p rf n in te gr ated td d r f tr ansceiver f m demodulat o r po wer management data slicer rx fifo packet pro cessi ng & s ta te cont ro l csn sc k mos i miso ir q ce fm m odu lator ga ussian shaping tx fifo xtalp xtaln figure 1 TRW-24G2 chip block diagram wenshing confidential do not distribution http://www.wenshing.com.tw;http://www.rf.net.tw p . 4 2 abbrev ia tio ns a ck a ck n o wl edgement arc auto re tr an smis si on co unt ard auto re tr an sm is si on delay cd ca rri er det ec ti on ce ch ip enable crc cy clic redund ancy check csn ch ip select not dpl dy nami c payload length fifo f ir st-in -f ir st-out gfsk g au ssian frequency sh if t key ing ghz gigahe rt z lna low no ise amp lifi er i rq in te rr upt request i sm indust ri al- sc i en tific-med ical l sb l ea st significant bi t max_ rt maximu m re tr an smit mbps megabit per seco nd mcu microcon tr o ll er un i t mhz megahe rt z mi so mast er in slav e out mosi mast er out slav e in msb mo st significant bi t pa po w er amp lifier pid packet iden ti ty b it s pld payload prx p ri mary rx ptx p ri mary tx pwd_ dwn po w er do wn pwd_ up po w er up rf_ch radio frequency channel rssi rece iv ed signal s tr en gth indi ca tor rx rece iv e rx_ dr rece iv e data ready sck spi clock spi se ri al pe ri pher al in te rf ace tdd ti m e division dupl ex tx transmit tx_ ds transmit data sent xtal cryst al wenshing confidential do not distribution http://www.wenshing.com.tw;http://www.rf.net.tw p . 5 3 pi n information figure 2 TRW-24G2 pin as si gnm en t s (t op view) p in n a m e pin function description 1 m iso digital output spi slave data output with tri - state option 2 ipq digital output m askable interrupt pin,active low 3 nc no connection 4 nc no connection 5 vcc power power supply( 1.9 v to 3.6 v dc ) 6 gnd ground ground(0) 7 ce digital input chip enable activates rx or tx mode 8 m qsi digital input spi slave data input 9 cns digital input spi chip select,active low 10 sck digital input spi clock table 1 TRW-24G2 pin functions wenshing confidential do not distribution http://www.wenshing.com.tw;http://www.rf.net.tw p . 6 4 st ate co nt rol 4.1 s ta te co ntrol diagra m pin s ig nal: vd d , ce spi r eg ister: pwr_ u p, pri m_ rx, en_ aa, no_ ack , ar c, a rd system info rmation: time ou t, a ck rece iv ed, a rd el ap sed, arc_ cn t, t x fif o emp ty , ack packet tr an smitted, packet rece iv ed TRW-24G2 has bu ilt -in state machines that con tr ol the stat e tr an sition be tw een d ifferent modes. when au to ack no wl edge featur e is d is ab led, st at e tr an sition wil l be fu lly con tr o ll ed b y mcu. vdd>= 1 .9 v power down pwr_u p =1 pw r _u p =0 standby -i time out or ack received ce=1 ard elapsed and ar c _cnt http://www.wenshing.com.tw;http://www.rf.net.tw p . 8 the ptx devi ce stays in tx mo de un ti l i t fi ni sh es tr an smitting the cu rr ent packet. if ce = 0 it returns to standby -i mode. if ce = 1, the next ac ti on is determined b y the status of the tx fifo. if the tx fifo is not emp ty the ptx dev ice remains in tx mode, tr an smitting the next packet. if the tx fifo is emp ty the ptx dev ice goes in to stan d by-ii mode. if the au to re tr an smit is enabl ed (en_ aa=1) and auto acknowl ed g e is requ ir ed (no_ack=0 ), the ptx d ev i ce w il l en t er tx mode fr om standb y- i mode when ar d el ap sed and number of ret ri ed is les s than ar c. prx dev ice (prim_rx=1) the prx dev i ce will en t er tx mode fr om rx mode on ly when en_ aa =1 and no_ack= 0 in rece iv ed packet to tr an smit acknowledge packet with pending payload in tx fifo. 4.6 rx mode prx dev ice (prim_rx=1) the rx mode is an activ e mode where the TRW-24G2 r ad io is co n fi gu r ed to be a rece iv er. to en t er th is mode fr om standby-i mode, the prx devi ce must hav e the pwr_up bit set high, pri m_ rx b it set h ig h and the ce pin 5 packet pro ce ssi ng set h igh. or prx dev i ce ca n en t er th is mode fr om tx mode a ft er tr an smit ti ng a n acknowledge packet when en_ aa =1 an d no_ ack=0 in received packet. in th is mode the rece iv er demodulates the signals fr om the r f channel, con st an tl y p res en ti ng the demodulated data to the packet p rocessing eng ine. th e p acket processing engine co n ti nuously searches for a v a li d packet . i f a va li d packet i s found (b y a mat ch ing address an d a v a li d crc) the payload of the pack et is present ed in a v acant slot in the rx fifo. if the rx fifo is fu ll, the rece iv ed packet is discarded. the prx dev i ce remains in rx mode u n ti l the mc u con fi gu res i t t o standby - i mode or pow er down mode. in rx mode a ca rri er det ec tion (cd) signal i s av a il ab l e. the cd is set to high when a rf signal is det ec ted inside the rece iv ing fr equency channel. the internal cd signal i s filter ed before pres en t ed to cd r eg ister. the rf signal must be p resent f or at l ea st 128 s befo r e the cd i s s et h ig h. ptx dev ice (pri m_ rx=0) the ptx dev ice w il l en t er rx mode fr om tx mode only when en_ aa =1 and no_ack= 0 to rece iv e acknowledge p ac k et. 5.1 pa c ke t fo rmat the packet fo rm at has a preamb le, address, packet con tr o l, payload and crc fi eld. pream bl e 1 byt e addres s 3 ~5 byt e packet control 9/ 0 bi t payload 0~32 byt e cr c 2/1 by te payload lengt h 6 bi t pi d 2 bi t no_ a c k 1 bit figure 5 pa ck et form wenshing confidential do not distribution http://www.wenshing.com.tw;http://www.rf.net.tw p . 9 5.1.1 preamble the preamb l e is a bit sequence used t o d etect 0 and 1 levels in the rece iv er. the p r ea mb le i s one b y t e long and i s either 010 1010 1 or 101010 10. if the f ir st bi t in the address is 1 the pr ea mble is au to mati ca lly set to 10101010 and i f the first bi t i s 0 the p r ea mbl e i s au to ma ti ca lly set to 010101 01. this is done t o en su re there are enough tr an sitions in the pr ea mbl e to st ab ilize the rece iv er. 5.1.2 add re ss this is the address for the rece iv er. an addres s en su res that the packet is d etec ted by the target rece iv er. the address fi eld can be con fi gure d to be 3, 4, or 5 by tes long by the aw r eg ister. the prx dev i ce can open u p to six data pipes to support up to six ptx devices with unique addresses. all six ptx d ev i ce addresses ar e searched si mu lt aneously. in prx side, the dat a pipes are enabl ed with the b it s in the en_ r xa ddr r eg ister. by def au lt only dat a pipe 0 and 1 ar e enabled. each data p ipe address is con fi gur ed in the rx_ addr_ px register s. each p ipe can hav e up to 5 b y t es con fi gu r ab l e addres s. data p ipe 0 has a unique 5 by t e address. data p ipes 1-5 sh ar e the 4 most significant address by tes. the l sb by te must be unique for all 6 pipes. to en su re that the a ck packet fr om the pr x i s tr an smitted to the co rr ect pt x , the pr x takes the data p ipe address where it rece iv ed the packet and us es it as the tx address when tr an smi tti ng the a ck packet. on the prx the rx_ addr_ pn, de fi ned as the pipe addres s, must be u nique. on th e pt x the tx_ ad dr must be the same as the rx_ addr_ p0 o n the ptx, and as th e p ip e addres s for the de si gnated pipe on the prx. no o ther data pipe can re ce iv e data un ti l a co mp lete packet i s rece iv ed b y a data pipe that has det ect ed it s address. when multip le pt x devices are tr an smit ti ng to a prx, the ar d can be us ed to sk ew the au to re tr an smis si on so that th ey on ly b lock each oth er once. 5.1.3 pack et control when dy n amic payload length func ti on i s enabled, the p acket con tr ol fi eld contains a 6 b it payload length fi eld, a 2 b i t pid (packet iden ti ty ) field and, a 1 bit no_ a ck fl ag. pay load length the pay load length fi eld is only used if the dyn ami c pay load length func ti on i s enabled. pid the 2 b it pid fi eld is us ed to detect whether the rece iv ed packet is new or re tr an smi tt ed. pid p rev en ts the prx dev i ce fr om pres en ti ng the same pay load mo r e than once t o the mcu . the pid fi eld is increm en t ed at the tx side for each new packet rece iv ed th rough the spi . the pid and cr c fi elds are used by the pr x devi ce to determine whether a p acket is old or new. wh en sev er al data packets are lost on th e li nk, the pid fi elds may b e co me equal to the last rece iv ed pid . if a packet has the sam e pi d as the prev ious packet, TRW-24G2 co mpares the cr c su m s fr om bot h packets. i f the crc sums are al so equal, the las t rece iv ed packet is con si der ed a copy of the p reviously rece iv ed packet and d iscarded. no_ a ck the no_ ack fl ag is on ly u sed when the au t o acknowledgement f ea tu re is use d. se tti ng the fl ag h igh, te ll s the rece iv er that the pack et i s not to be auto acknowled ged . the ptx can set the no_ a ck fl ag bit in the packet con tr ol field wi th the co mm and: w_ tx_payload_ no a ck .ho wev er , the func ti on must first be enabled in the feat u re r eg ist er b y se tti ng the en_ dy n_ a ck b it . when y ou use th is op ti o n, wenshing confidential do not distribution http://www.wenshing.com.tw;http://www.rf.net.tw p . 10 the ptx goes d ir ec tl y to standb y-i mode a ft er tr an smi tti ng the packet and the prx d oes not tr an smit an a ck packet when it rece iv es the packet. 5.1.4 pa y lo ad the pay load is the us er defined content of the packet. it can be 0 to 32 b yt es wi de, and it i s tr an smi tt ed on-air as it i s up loaded (unmod ified) to the dev ice. the TRW-24G2 p ro v ides tw o a lt erna ti v es for hand li ng pay load lengths, sta ti c and dy n ami c payload length. the sta ti c pay load length of each of six data p ipes can be ind iv idually s et . the def au lt a lt erna ti v e is sta ti c pay load length. w it h sta ti c payload length all packets b e tw een a tr an smitter and a re ce iv er hav e the sam e length. sta ti c pay load length is set b y the rx_ p w_ px reg ister s. the pay load length on the tr an smitt er side is set b y the number of bytes clocked in to the tx_ fif o and must equal the v alue in the rx_pw_ px r eg ist er on the rece iv er side. each pipe has it s ow n payload length. dyn amic payload length (d pl ) is an a lt erna ti v e to sta ti c pay load length. dp l enabl es the tr an smitt er to send p ackets with va ri ab le pay load length to the rece iv er. this means for a syste m with d ifferent payload lengths it is not necess ar y to scale the packet length to the longest payload. w it h dp l f ea ture the TRW-24G2 can decode the pay load length of the rece iv ed packet au to ma ti ca lly inst ead o f using the rx_ pw _ px r eg ister s. the mcu can read the length of the rece iv ed pay load by usin g the co mm and: r_rx_ pl_wid. in o rder to enable dp l the en_ dpl bit in the feat u re r eg ist er must be s et . in rx mode the dyn pd r eg ist er has to be s et . a ptx that tr an smits to a prx with dpl enabl ed must hav e the dpl_p0 bit in dyn pd s et . 5.1.5 crc the crc is the e rr or det ec tion mechanism in the packet. the number of by t es in the crc i s set b y the cr co b it in the config r eg ister . it may be e it her 1 or 2 b ytes and is ca l cu lated o v er the addres s, packet con tr ol field, and pay load. the poly no mi al for 1 b y te crc is x 8 + x 2 + x + 1. in iti al v alue is 0x ff . the po ly n o mi al for 2 b y te c rc is x 16 + x 12 + x 5 + 1. in iti al v alue is 0x ffff . no p acket is accep t ed by rece iv er side if the crc fa ils. 5.2 pa c ke t ha nd l in g TRW-24G2 uses burst mode f or pay load tr an smis si on and rece iv e. the tr an smitt er fetches p ay load fr om tx fifo , au to ma ti ca lly assembl es it into packet an d tr an smit s the packet in a ver y shor t burst pe ri od with 1mbps or 2mbp s ai r dat a rat e. a ft er tr an smis si on, if the ptx packet h as the no_ ack fl ag s et , TRW-24G2 s et s tx_ ds and giv es an ac ti v e low inte rr upt i rq t o mcu. i f the pt x i s ack packet , the pt x needs rece iv e a ck fr om the prx and then assert s the tx_ d s irq. the receiv er au to ma ti ca ll y validat es and d isassemb les rece iv ed packet , i f ther e is a v a li d packet with in the new pay load, i t wi l l write the p ay load in to rx fifo, set rx_ d r and give an activ e low in terrupt i rq to mcu. when auto acknowled ge is en ab led (en_ aa =1 ) , the pt x device w ill au to ma ti ca lly wai t for acknowledge p acket a ft er tr an smis si on, and re-tr an smit o ri g inal packet with the delay of ard u ntil an acknowledge packet is receiv ed or the number of re- tr an smission exceeds a threshold ar c. i f the lat er one happens , TRW-24G2 will se t max_ rt an d g iv e an ac ti v e low inte rrupt wenshing confidential do not distribution http://www.wenshing.com.tw;http://www.rf.net.tw p . 11 i rq to mcu. two packet loss counter s (arc_cnt and plos_cnt) are increm en ted each ti me a packet is lost. the arc_cn t count s the nu mber of re tr ansmissions for the cu rr ent tr an s ac ti on. the plo s_ cn t count s the total number of re tr an smissions since the last channel change. arc_cnt is res et by initia ti ng a new tr an s ac ti o n. plos_cnt i s res et by writing to the rf_ ch r eg ister. it i s pos si b le to use the in forma ti on in the obs er ve_ tx r eg ister to make an ov eral l assessment of the channel q u a li ty. the ptx dev i ce will re tr an smit if it s rx fifo i s fu ll but rece iv ed a ck fr ame has payload. as an al te rna ti ve for ptx dev i ce to au t o re tr an smit it is pos si b le to manually set the TRW-24G2 to re tr an smit a packet a n umber of times. this is done b y the reuse_ tx_p l co mmand. when au to ac k no wl edge is enabled, the pr x devi ce will au to ma ti ca lly check the no_ ack fi eld in receiv ed packet, and if no _ ack=0, i t wil l au tomati ca lly send an acknowl ed g e packet to ptx dev ice. if en_ ack_pay is s et , and the ack no wl edge pack et can also include pending pay load in tx fifo. 6 da ta a nd control interface 6.1 tx/rx fifo the data fifos are used to store payload that i s to be tr an smitted ( tx fifo) or payload that is rece iv ed and r ea d y to be clocked out (r x fifo). the fifo is acces si b le in both pt x mode and prx mode. there ar e th r ee levels 32 byt es fifo for bot h tx an d rx, su pporting bo th ac k no wl edge mode or no acknowledge mode with up to six pipes. tx thre e lev els, 32 by te fi fo rx thr ee lev els, 32 by te fi fo bo th fifos hav e a con tr o ll er and are acces si ble throu gh the spi b y using dedi ca ted spi commands. a tx fifo in prx can stor e payload for ack packet s t o thr ee d ifferent ptx dev i ce s. i f the tx fifo contains mor e than one pay load to a p ipe, payloads ar e handl ed using the fir st in f ir st out p ri ncip le. the tx fifo in a pr x is b locked if al l pending payloads are addressed to pipes wher e the li nk to the ptx i s lost. in th is cas e, the mcu can fl ush the tx fifo b y using the flush_tx co mm and. the rx fifo in prx may contain pay load fr om up to three different ptx devi ce s. . a tx fifo in ptx can hav e up to thr ee payloads stored. the tx fifo can be writt en to b y thr ee co mmands, w_tx_ payload an d w_ tx_payload_ no_ ack in ptx mode and w_ack_payload in prx mode. al l th r ee co mm ands g iv e access to the tx_ pl d r eg ister. the rx fifo can be r ead by the co mmand r_rx_payl oa d in both ptx an d pr x mode. this command gives acc ess to the rx_ pld r eg ister. the pay load in tx fifo in a ptx is not remo v ed i f the ma x_rt irq i s asse rt ed. in the fifo_status r eg ister i t is pos si b le t o r ead i f the tx and rx fifo are full or emp ty . the tx_ re use bit is also av a il ab le in the fifo_status r eg ister. tx_reu se is se t by the sp i co mmand reus e_ tx_ pl , and i s reset by the sp i co mm an d : w_ tx_payload or flu sh tx. 6.2 inte rr upt in TRW-24G2 ther e is an ac ti v e low inte rr upt (irq) p in, wh i ch is ac ti v at ed when tx_ d s irq, rx_ dr irq or max_ rt irq are se t h igh by the state machine in the st atu s r eg ister. the irq p in resets when m cu writ es '1 ' to the irq source bi t in the status r eg ister . the irq mask in the config wenshing confidential do not distribution http://www.wenshing.com.tw;http://www.rf.net.tw p . 12 r eg ist er is used to s el ect the i rq sources that are a llow ed to ass er t the irq p in. by set ti n g one of th e mask b it s high, the co rr esponding i rq sour ce is d isab led. by def au lt all irq sources are en ab led. the 3 b it pipe in fo rma ti on in the st atu s r eg ister is updat ed du ri ng the i rq p in h igh t o low tr an sition. if the statu s r eg ist er is rea d du ri ng an irq p in h igh to l ow tr an sition, the pipe in fo rma ti on is unre li ab l e. 6.3 spi interface 6.3.1 spi co mm and the spi co mm ands ar e show n in tabl e 2 . every new co mmand must b e sta rt ed by a high to low tr an sition on csn. in para llel to the spi co mmand wo rd app li ed on the mosi pin, the status r eg ist er i s sh i ft ed se ri ally out on the mi so p in. the se ri al sh ifting spi co mmands is in the fo ll o wi ng format: http://www.wenshing.com.tw;http://www.rf.net.tw p . 13 a c t i v a t e 01 0 1 0 0 0 0 1 t h is w ri t e c o mma n d f o l lo w e d b y d a ta 0 x 7 3 ac t i va tes t h e f o l lo w i n g f ea t u r e s: ? r _ r x _ p l _ w i d ? w _ ac k _ p a y l o a d ? w _ t x _ p a y l o a d _ n o a ck a ne w a c t i v a t e c o mma n d w i t h t h e s a m e d a ta d eac t i va tes t he m a g a i n . t h is is exec u ta b le in po w e r do w n o r st a n d b y m od e s on l y . t h e r _ r x _ p l _ w id, w _ a ck _ p a y l o a d , a n d w _ t x _ p a y l o a d _ n o a ck f ea t u r e s re g isters a re i n i t ially in a d eac t i va ted st a te; a w ri t e h a s n o e f f ec t, a r ea d on ly r e s u l t s in ze r o s o n mi s o. t o ac t i va te t h e se r eg ister s , u se t h e a c t i v a t e c o mma n d f o l lo w e d b y d a ta 0 x 7 3 . t h e n t h e y c a n b e acce s se d a s a n y o t h e r r eg ister. u s e t h e s a m e c o mma n d a n d d a ta t o d eac t i va te th e r eg isters a ga i n . t h is w ri t e c o mma n d f o l lo w e d b y d a ta 0 x 5 3 t o gg les t h e r eg ister b a n k , a n d t h e c u rr e n t r eg ister b a n k nu m b e r ca n b e r ea d o u t f r o m re g 7 [ 7 ] r _ rx _ p l _ w id 01 1 0 0 0 0 0 r ea d r x - p a y l o a d w i d th f o r t h e t o p r _ rx _ p a y l o ad in t h e r x f i fo. w _ a c k _ p a y l o ad 10 1 0 1 ppp 1 to 3 2 l sb b y te f irst u se d in r x m od e . w ri t e p a y l o a d to b e tra n s m i t ted t o ge t h e r w i t h a ck p a c ke t o n p i p e ppp. ( ppp va l i d in t h e r a n g e f r o m 00 0 t o 1 0 1 ). m ax i m u m t h r e e a ck p a c ke t p a y l o a d s c a n b e p e n d i n g . p a y l o a d s w i t h s a m e ppp a re h a nd l e d u s i n g f irst in - f irst o u t p r i n c i p le. w ri t e p a y l o a d : 1 C 3 2 b y te s . a w ri t e op e r a t io n a l w a y s sta rts a t b y te 0 . w _ t x _ p a y l o a d _ no a ck 10 1 1 0 0 0 0 1 to 3 2 l sb b y te f irst u se d in t x m od e . dis a b les a uto a c k o n t h is s p ec i f ic p a c ke t. n o p 11 1 1 1 1 1 1 0 no o p e r a t i o n . m i g h t b e u s e d t o r ea d t h e s t a t us r eg ister table 2 spi co mm and 6.3.2 spi timi ng sck csn mosi write to spi register: x c7 c6 c5 c4 c3 c2 c1 c0 x d7 d6 d5 d4 d 3 d2 d1 d0 x miso hi-z s7 s 6 s 5 s4 s 3 s 2 s1 s0 0 0 0 0 0 0 0 0 hi-z mosi read from spi register: x c7 c6 c 5 c4 c3 c2 c1 c0 x miso x s7 s 6 s 5 s4 s 3 s 2 s1 s0 d7 d6 d 5 d4 d 3 d2 d 1 d0 x figure 6 spi ti mi ng wenshing confidential do not distribution http://www.wenshing.com.tw;http://www.rf.net.tw p . 14 cn: spi co mm and bit sn: status reg ist er b it dn: dat a bit (l sb by t e to m sb b yte, m sb b it in each b y t e first) not e: the spi timing i s for bank 0 and r eg ist er 9 to 1 4 at bank 1. for r eg ist er 0 to 8 at bank 1, the by t e order i s inv ersed that the msb b y t e is r/w befo r e l sb b yt e. figure 7 s pi nop timing diag ram symb o l p a r a m e t e rs m i n max u ni t s t d c d a ta to sck s e t u p 1 0 n s t d h sck to d a ta h o l d 2 n s t c sd csn to d a ta v a l i d 3 8 n s t c d sck to d a ta v a l i d 5 5 n s t c l sck l o w t i m e 4 0 n s t c h sck hi g h t ime 4 0 n s fs c k sck f r e qu e n c y 0 8 mh z t r , tf sck rise a n d f a l l 10 0 n s t c c csn to sck s e t u p 2 n s t cc h sck to c sn h o l d 2 n s t c w h csn i n ac t i v e t i m e 5 0 n s t c d z csn to o u t p u t hi g h z 3 8 n s table 3 spi ti ming paramet er wenshing confidential do not distribution http://www.wenshing.com.tw;http://www.rf.net.tw p . 15 7 register map there are tw o reg ist er banks, whi ch can be toggl ed by spi command a ct ivat e fo ll ow ed wi th 0x53 by te, and bank st atus can be r ead fr om bank0_reg7 [7]. 7.1 register bank 0 a d d ress (h e x ) mne m onic b i t r e s et v a l ue t ype d e s c r i p t i on 0 0 co n fig c on f i g u r a t io n r eg ister r e s e r v e d 7 0 r/w o n ly ' 0 ' a l l o w e d m a sk _ r x _ dr 6 0 r/w m a sk i n terr up t ca u s e d b y r x _ d r 1 : i n terr up t n o t r e f le c ted o n t h e i rq p in 0 : r e f le c t r x _ dr as a c t i v e l o w i n terr u p t o n t h e irq p in m a sk _ t x _ ds 5 0 r/w m a sk i n terr up t ca u s e d b y t x _ ds 1 : i n terr up t n o t r e f le c ted o n t h e i rq p in 0 : r e f le c t t x _ ds a s a c t i v e l o w i n terr u p t o n t h e irq p i n m a sk _ m a x _ rt 4 0 r/w m a sk i n terr up t ca u s e d b y m a x _ rt 1 : i n terr up t n o t r e f le c ted o n t h e i rq p in 0 : r e f le c t m a x _ rt a s a c t i v e l o w i n terr up t o n t h e irq p in en _ crc 3 1 r/w e n a b le crc. f o r ce d h i g h if o n e o f t h e b i t s in t h e en _ a a is h i g h crco 2 0 r/w crc e n c od i n g s c h e m e ' 0 ' - 1 b y te ' 1 ' - 2 b y tes p w r _ u p 1 0 r/w 1 : p o w er u p , 0 : p o w er d o w n p r i m _ r x 0 0 r/w r x / t x co n t r ol , 1 : p r x , 0 : p t x 0 1 en _ aa e n a b le ? a u to a ck no w le dg me n t? f un c t i o n r e s e r v e d 7 :6 0 0 r/w o n ly ' 00 ' a l lo w e d ena a _ p 5 5 1 r/w e n a b le a u t o ack no w le d g e m e n t d a ta p i p e 5 ena a _ p 4 4 1 r/w e n a b le a u t o ack no w le d g e m e n t d a ta p i p e 4 ena a _ p 3 3 1 r/w e n a b le a u t o ack no w le d g e m e n t d a ta p i p e 3 ena a _ p 2 2 1 r/w e n a b le a u t o ack no w le d g e m e n t d a ta p i p e 2 ena a _ p 1 1 1 r/w e n a b le a u t o ack no w le d g e m e n t d a ta p i p e 1 ena a _ p 0 0 1 r/w e n a b le a u t o ack no w le d g e m e n t d a ta p i p e 0 0 2 en _ r x a d d r e n a b led rx a dd r e s se s r e s e r v e d 7 :6 0 0 r/w o n ly ' 00 ' a l lo w e d er x _ p5 5 0 r/w e n a b le d a ta p i p e 5 . er x _ p4 4 0 r/w e n a b le d a ta p i p e 4 . er x _ p3 3 0 r/w e n a b le d a ta p i p e 3 . er x _ p2 2 0 r/w e n a b le d a ta p i p e 2 . er x _ p1 1 1 r/w e n a b le d a ta p i p e 1 . er x _ p0 0 1 r/w e n a b le d a ta p i p e 0 . wenshing confidential do not distribution http://www.wenshing.com.tw;http://www.rf.net.tw p . 16 0 3 se t u p _ a w s e t u p o f a dd r e ss w i d t h s ( c o m m o n f o r a ll d a ta p i p e s) r e s e r v e d 7 :2 00 0 0 0 0 r/w o n ly ' 0000 0 0 ' a l lo w e d aw 1 :0 1 1 r/w r x / t x a dd r e ss f ield w i d t h ' 00 ' - il l ega l ' 01 ' - 3 b y tes ' 10 ' - 4 b y tes ' 11 ' - 5 b y tes l sb b y t e s a re u s e d if a dd r e ss w i d th is b e l o w 5 b y tes 0 4 se t u p _ re t r s e t u p o f a u t o m a t i c r e tra n s m iss i o n a rd 7 :4 00 0 0 r/w a u to r e tra n s m i s s i o n d e l a y ? 0 0 00 ? C w a it 2 5 0 u s ? 0 0 01 ? C w a it 5 0 0 u s ? 0 0 10 ? C w a it 7 5 0 u s .. ? 1 1 11 ? C w a it 4 0 0 0 u s (d e l a y de f i n e d f r o m e n d o f tra n s m i s si o n t o st a rt o f n ex t tra n s m issi on ) a rc 3 :0 00 1 1 r/w a u to r e tra n s m i s s i o n c ou n t ? 0 0 00 ? C r e - t r a n s m it d is a b led ? 0 0 01 ? C up to 1 re - t r a n s m is s i o n o n f a il o f aa ? 1 1 11 ? C up to 1 5 re - t r a n s m i s s i o n o n f a il o f aa 0 5 rf _ ch rf c h an n e l r e s e r v e d 7 0 r/w o n ly ' 0 ' a l l o w e d rf _ ch 6 :0 00 0 0 0 1 0 r/w s e ts t h e f r e qu e n c y c h a nn e l 0 6 rf _ se t u p rf s e t u p r eg ister r e s e r v e d 7 0 r/w r e s e r v e d 6 0 r/w r e s e r v e d 5 1 r/w r e s e r v e d 4 1 r e s e r v e d rf _ dr 3 1 r/w a ir d a ta ra t e ? 0 ? C 1 m bp s ? 1 ? C 2 m bp s rf _ p w r[ 1 : 0 ] 2 :1 1 1 r/w s e t rf o u t pu t po w e r in t x m o d e rf _ p w r[ 1 : 0 ] ' 00 ' 1 0 d bm ' 01 ' 5 d bm ' 10 ' 0 d bm ' 11 ' 5 d bm l n a _ hc u rr 0 1 r/w s e t u p l na ga in 0 : l o w ga i n ( 20d b do w n ) 1 :hi g h ga in 0 7 sta t us stat u s re g ister (in p a r a l l e l t o t h e s p i c o mma n d w o rd a pp l ied o n t h e m osi p i n , t h e s t a t us r eg ister is s h i f t e d s e rially ou t o n t h e m iso p i n ) rb a n k 7 0 r r eg ister b a n k s e le c t io n st a te s . switch r eg ister b a n k is d o n e b y s p i c o mma n d a c t i v a t e f o l lo w e d b y 0 x 5 3 0 : r eg ister b a n k 0 wenshing confidential do not distribution http://www.wenshing.com.tw;http://www.rf.net.tw p . 17 1 : r eg ister b a n k 1 r x _ dr 6 0 r/w d a ta re a d y rx fifo i n terr u p t a s s e rted w h e n n e w d a ta arri v e s r x f i fo w ri t e 1 to c le a r b i t. t x _ ds 5 0 r/w d a ta s e n t t x fifo i n ter r up t a s s e rted w h e n p acke t tra n s m i t ted o n t x . if a u t o _ a ck is a c t iv a te d , t h is b it is s e t h i g h on ly w h e n ack is r ece i v e d . w ri t e 1 to c le a r b i t. m a x _ rt 4 0 r/w m ax i m u m nu m b e r o f t x r e tra n s m i t s i n terr u p t w ri t e 1 to c le a r b i t. if m a x _ rt is a s se rted it m u st b e c le a r e d to e n ab le f u rt h e r c o m m un ic a t ion . r x _ p _ no 3 :1 11 1 r d a ta p i p e n u m b e r f o r t h e p a y l o a d ava i l a b le f o r r ea d i n g f r o m r x _ fifo 00 0 - 1 01 : d a ta pi p e n u m b e r 11 0 : n o t u s e d 11 1 : r x f i fo e m p ty t x _ fu l l 0 0 r t x fifo f u ll f la g . 1 : t x f i fo f u ll 0 : a va i l a b le l o ca t ion s i n t x f i f o 0 8 obs e r v e _ t x t r a n s m it ob s e r v e r eg ister p l os _ cnt 7 :4 00 0 0 r c ou n t l o st p acke ts. t h e c oun ter i s o ve r f l o w p r o te c ted t o 15 , a n d d is co n t i nu e s a t ma x un t i l r e s e t. t h e c ou n ter i s re se t b y w ri t i n g to rf _ ch. a rc _ c n t 3 :0 00 0 0 r c ou n t r e tra n s m i t ted p acke ts. t h e c oun ter i s r e s e t w h e n tra n s m issi o n o f a n e w p acke t st a rts. 0 9 cd r e s e r v e d 7 :1 00 0 0 0 0 r cd 0 0 r c a rrier d e te c t 0 a r x _ a d d r _ p 0 39 : 0 0 x e 7 e 7 e 7 e 7 e 7 r/w r ece i v e a dd r e ss d a ta p i p e 0 . 5 b y tes max i m u m le n g t h . ( l sb b y te is writ t e n f i rst. w ri t e t h e nu m b e r o f b y tes de f i n e d b y se t u p _ a w ) 0 b r x _ a d d r _ p 1 39 : 0 0 x c 2 c 2 c 2 c 2 c 2 r/w r ece i v e a dd r e ss d a ta p i p e 1 . 5 b y tes max i m u m le n g t h . ( l sb b y te is writ t e n f irst. w ri t e t h e nu m b e r o f b y tes de f i n e d b y se t u p _ a w ) 0 c r x _ a d d r _ p 2 7 :0 0 x c3 r/w r ece i v e a dd r e ss d a ta p i p e 2 . o n ly l sb m sb b y tes is e qu a l to rx _ a d d r _ p 1 [ 39 : 8 ] 0 d r x _ a d d r _ p 3 7 :0 0 x c4 r/w r ece i v e a dd r e ss d a ta p i p e 3 . o n ly l sb m sb b y tes is e qu a l to rx _ a d d r _ p 1 [ 39 : 8 ] 0 e r x _ a d d r _ p 4 7 :0 0 x c5 r/w r ece i v e a dd r e ss d a ta p i p e 4 . o n ly l sb. m sb b y tes is e qu a l to rx _ a d d r _ p 1 [ 39 : 8 ] 0 f r x _ a d d r _ p 5 7 :0 0 x c6 r/w r ece i v e a dd r e ss d a ta p i p e 5 . o n ly l sb. m sb b y tes is e qu a l to rx _ a d d r _ p 1 [ 39 : 8 ] 1 0 t x _ a d d r 39 : 0 0 x e 7 e 7 e 7 e 7 e 7 r/w t r a n s m it a dd r e s s . u se d f o r a p t x d ev ice on l y . ( l sb b y te is w ri t ten f irst) s e t rx _ a d d r _ p 0 e qu a l to t h is a dd r e ss to h a nd le a u t o m a t i c ack no w l e d g e if t h is is a p t x d ev ice wenshing confidential do not distribution http://www.wenshing.com.tw;http://www.rf.net.tw p . 18 1 1 r x _ p w _ p0 r e s e r v e d 7 :6 0 0 r/w o n ly ' 00 ' a l lo w e d r x _ p w _ p0 5 :0 00 0 0 0 0 r/w n u m b e r o f b y tes in rx p a y l o a d in d a ta p i p e 0 (1 to 3 2 b y te s ). 0 : no t u s e d 1 = 1 b y te 3 2 = 3 2 b y tes 1 2 r x _ p w _ p1 r e s e r v e d 7 :6 0 0 r/w o n ly ' 00 ' a l lo w e d r x _ p w _ p1 5 :0 00 0 0 0 0 r/w n u m b e r o f b y tes in rx p a y l o a d in d a ta p i p e 1 (1 to 3 2 b y te s ). 0 : no t u s e d 1 = 1 b y te 3 2 = 3 2 b y tes 1 3 r x _ p w _ p2 r e s e r v e d 7 :6 0 0 r/w o n ly ' 00 ' a l lo w e d r x _ p w _ p2 5 :0 00 0 0 0 0 r/w n u m b e r o f b y tes in rx p a y l o a d in d a ta p i p e 2 (1 to 3 2 b y te s ). 0 : no t u s e d 1 = 1 b y te 3 2 = 3 2 b y tes 1 4 r x _ p w _ p3 r e s e r v e d 7 :6 0 0 r/w o n ly ' 00 ' a l lo w e d r x _ p w _ p3 5 :0 00 0 0 0 0 r/w n u m b e r o f b y tes in rx p a y l o a d in d a ta p i p e 3 (1 to 3 2 b y te s ). 0 : no t u s e d 1 = 1 b y te 3 2 = 3 2 b y tes 1 5 r x _ p w _ p4 r e s e r v e d 7 :6 0 0 r/w o n ly ' 0 0 ' a l lo w e d r x _ p w _ p4 5 :0 00 0 0 0 0 r/w n u m b e r o f b y tes in rx p a y l o a d in d a ta p i p e 4 (1 to 3 2 b y te s ). 0 : no t u s e d 1 = 1 b y te 3 2 = 3 2 b y tes 1 6 r x _ p w _ p5 r e s e r v e d 7 :6 0 0 r/w o n ly ' 00 ' a l lo w e d r x _ p w _ p5 5 :0 00 0 0 0 0 r/w n u m b e r o f b y tes in rx p a y l o a d in d a ta p i p e 5 (1 to 3 2 b y te s ). 0 : no t u s e d 1 = 1 b y te 3 2 = 3 2 b y tes 1 7 fifo _ s t a t us fifo s tat u s r eg ister r e s e r v e d 7 0 r/w o n ly ' 0 ' a l l o w e d t x _ reuse 6 0 r r e u se la s t tra n s m i t ted d ata p acke t if s e t h i g h . wenshing confidential do not distribution http://www.wenshing.com.tw;http://www.rf.net.tw p . 19 t h e p acke t is r e p ea te d l y r e tra n s m i t ted a s l on g a s ce is h i g h . t x _ reuse i s s e t b y t h e s p i c o m m a n d reuse _ t x _ p l , a n d is r e s e t b y t h e s p i c o m m a n d w _ t x _ p a y l o a d o r f l ush t x t x _ fu l l 5 0 r t x fifo f u ll f lag 1 : t x f i fo f u l l ; 0 : a va i l a b le l o ca t ion s i n t x fifo t x _ e m p t y 4 1 r t x fifo e m p t y f l a g . 1 : t x f i fo e m p t y 0 : d a ta in t x f ifo r e s e r v e d 3 :2 0 0 r/w o n ly ' 00 ' a l lo w e d r x _ fu l l 1 0 r rx f i fo f u ll f lag 1 : r x f i fo f u ll 0 : a va i l a b le l o ca t ion s i n r x f if o r x _ em p t y 0 1 r rx f i fo e m p t y f l a g 1 : r x f i fo e m p t y 0 : d a ta in r x f ifo n/a a ck _ p l d 25 5 :0 x w w ri t ten b y s e p a r a te s p i c o m m a n d a ck p acke t pa y l o a d to d a ta p i p e n u m b e r ppp g i ve n in s p i c o m m a n d u se d in r x m od e o n ly m ax i m u m t h r e e a ck p a c ke t pa y l o a d s c a n b e p en d i n g . p a y l o a d s w i t h s a m e ppp a re h a nd l e d f irst in f irst o u t. n/a t x _ p l d 25 5 :0 x w w ri t ten b y s e p a r a te s p i c o m m a n d t x d a ta p a y - l o a d r eg ister 1 - 3 2 b y te s . t h i s re g ister is i m p l e m e n ted a s a fifo w i t h t h r e e le v e ls. u se d in t x m od e o n ly n/a r x _ p l d 25 5 :0 x r r ea d b y s e p a r a te s p i c o m m a n d rx d a ta p a y l o a d r eg ister. 1 - 3 2 b y t e s. t h is r eg ister is i m p l e m e n ted a s a fifo w i t h t h r e e le v e ls. a ll rx c h a nn e ls s h a re t h e s a m e f if o . 1 c d y n p d e n a b le d y n a m ic pa y l o a d le n g th r e s e r v e d 7 :6 0 r/w o n ly ? 00 ? a l l o w e d d p l _ p5 5 0 r/w e n a b le d y na m ic pa y l o a d le n g th da ta p i p e 5 . (r e qu ires en _ d p l an d en aa _ p 5 ) d p l _ p4 4 0 r/w e n a b le d y na m ic pa y l o a d le n g th da ta p i p e 4 . (r e qu ires en _ d p l an d en a a _ p 4 ) d p l _ p3 3 0 r/w e n a b le d y na m ic pa y l o a d le n g th da ta p i p e 3 . (r e qu ires en _ d p l an d en aa _ p 3 ) d p l _ p2 2 0 r/w e n a b le d y na m ic pa y l o a d le n g th da ta p i p e 2 . (r e qu ires en _ d p l an d en aa _ p 2 ) d p l _ p1 1 0 r/w e n a b le d y na m ic pa y l o a d le ng th da ta p i p e 1 . (r e qu ires en _ d p l an d en aa _ p 1 ) d p l _ p0 0 0 r/w e n a b le d y na m ic pa y l o a d le n g th da ta p i p e 0 . (r e qu ires en _ d p l a n d ena a _ p 0 ) 1 d fea t ure r/w f ea t u re r eg ister r e s e r v e d 7 :3 0 r/w o n ly ? 000 0 0 ? a l l o w e d en _ d p l 2 0 r/w e n a b les d y na m ic p a y l o a d l e n g th en _ a ck _ p a y 1 0 r/w e n a b les p a y l o a d w i t h a ck en _ d y n _ a ck 0 0 r/w e n a b les t h e w _ t x _ p a y l o a d _ n o a ck c o mma n d n o t e: d ont w r it e re s erved reg i s t ers and reg i s t ers at o t her a d dre s s e s i n r eg i s t er b ank 0 table 4 r eg ister bank 0 wenshing confidential do not distribution http://www.wenshing.com.tw;http://www.rf.net.tw p . 20 7.2 register bank 1 a d d ress (h e x ) mne m onic b i t r e s et v a l ue t ype d e s c r i p t i on 0 0 31 : 0 0 w m u st w ri t e w i t h 0 x 4 0 4 b 0 1 e2 0 1 31 : 0 0 w m u st w ri t e w i t h 0 x c 04 b 0 0 0 0 0 2 31 : 0 0 w m u st w ri t e w i t h 0 x d 0 fc 8 c 0 2 0 3 31 : 0 0 x 03 0 0 1 2 0 0 w m u st w ri t e w i t h 0 x 99 0 0 3 9 4 1 0 4 31 : 0 0 w m u st w ri t e w i t h 0 x d 99 e 8 60 b(h i g h p o w e r) f o r s i n g le c a rrier m od e : 0 xd 99 e 8 62 1 2 0 1 w rf o u t p u t po w e r in t x m ode : 0 : l o w po w e r( - 30d b d o w n ) 1 :hi g h p o w e r 0 5 31 : 0 0 w m u st w ri t e w i t h 0 x 24 0 6 7 f a 6 (dis a b le rssi) rssi _ t h 29 : 2 6 w rssi t h r e s ho l d f o r cd d e te c t 0 : - 9 7 d b m , 2 d b/ste p , 1 5 : - 6 7 d b m rssi _ en 1 8 0 w rssi m ea s u r e me n t: 0 : en a b le 1 :dis a b le 0 6 31 : 0 0 w r e s e r v e d 0 7 31 : 0 0 w r e s e r v e d rb a n k 7 r r eg ister b a n k s e le c t io n st a te s . switch r eg ister b a n k is d o n e b y s p i c o mma n d a c t i v a t e f o l lo w e d b y 0 x 5 3 0 : r eg ister b a n k 0 1 : r eg ister b a n k 1 0 8 c h ip id 31 : 0 0 r beken c h ip id: 0 x 00 0 0 0 0 6 3 ( trw - 24g2 ) 0 9 0 r e s e r v e d 0 a 0 r e s e r v e d 0 b 0 r e s e r v e d 0 c 31 : 0 0 p le a se i n i t i a l i z e w i t h 0 x 0 0 7 3 1 2 0 0 0d ne w _ fea t ure 31 : 0 0 p le a se i n i t i a l i z e w i t h 0 x 0 0 80 b 4 3 6 0e r a mp 87 : 0 na w r a m p c u r v e p le a se w ri t e w i t h 0 x ffff f e f7 c f 2 0 8 1 0 4 0 8 2 0 4 1 n o t e: d ont w r it e re s erved reg i s t ers and no d e f i n iti on reg i s t ers i n reg i s t er b ank 1 table 5 r eg ister bank 1 wenshing confidential do not distribution http://www.wenshing.com.tw;http://www.rf.net.tw p . 21 8 el ec trical specificat io ns n a m e p a r a m e t e r ( c on d i t i on) m i n t ypi cal max u nit c o m m ent o p e ra t i n g c o n d it io n v dd v o l ta g e 1 .9 3 .0 3 .6 v t e m p t e m p e r a t u re - 4 0 + 2 7 + 8 5 o c di g it a l i n pu t p i n v ih hi g h le v e l 0 . 7 v dd 5 . 2 5 v v il l o w l e ve l v ss 0 . 3 v dd v di g it a l o u tp u t p i n v oh hi g h le v e l (io h = - 0 . 25 m a ) v dd - 0 .3 v dd v v ol l o w l e ve l(i o l = 0 . 25 m a ) 0 0 .3 v n o r m a l c o n d it io n i v dd p o w e r d o w n c u rre n t 3 u a i v dd sta n d b y - i c u rre n t 5 0 u a i v dd sta n d b y - ii c u rre n t 40 0 u a n o r m a l rf c o nd it i on f op o p e r a t in g f r e qu e nc y 24 0 0 25 2 7 m hz f x t al c r y st a l f r e qu e n c y 1 6 m hz rfsk a ir d a ta rate 1 2 m bp s t r a n s m itt e r p r f o u t p u t p o w e r - 4 0 0 5 d bm p bw m o d u lati o n 2 0 d b b a nd w i d t h ( 2 m bp s) 2 .5 m hz p bw m o d u lati o n 2 0 d b b a nd w i d t h ( 1 m bp s) 1 .3 m hz p r f1 o u t o f b an d e m issi o n 2 m hz - 2 0 d bm p r f2 o u t o f b an d e m issi o n 4 m hz - 4 0 d bm i v dd c u rre n t a t - 4 0 d bm ou t pu t po w e r 1 1 m a i v dd c u rre n t a t - 3 0 d bm ou t pu t po w e r 1 1 m a i v dd c u rre n t a t - 2 5 d bm ou t pu t po w e r 1 2 m a i v dd c u rre n t a t - 1 0 d bm ou t pu t po w e r 1 3 m a i v dd c u rre n t a t - 5 d bm ou t pu t po w e r 1 5 m a i v dd c u rre n t a t 0 d bm ou t pu t p o w e r 1 7 m a i v dd c u rre n t a t 5 d bm ou t pu t p ower 2 3 m a r ece i v e r i v dd c u rre n t ( 2 m b p s) 1 8 m a i v dd c u rre n t ( 1m b p s) 1 7 m a m a x i npu t 1 e - 3 ber 1 0 d bm r x sens 1 e - 3 ber s e n sit i v i t y ( 2m b p s) - 8 5 d bm r x sens 1 e - 3 ber s e n sit i v i t y (1m b p s) - 8 8 d bm c/ico c o - c h a nn e l c/i ( 2 m b p s) 4 d b c/i 1 st a cs c/i 2 m hz ( 2 m bp s) - 5 d b c/i 2 nd a cs c/i 4 m hz ( 2 m bp s) - 2 0 d b c/i 3 rd a cs c/i 6 m hz ( 2 m bp s) - 2 5 d b c/ico c o - c h a nn e l c/i ( 1m b p s) 4 d b c/i 1 st a cs c/i 1 m hz (1 m bp s) 4 d b c/i 2 nd a cs c/i 2 m hz (1 m bp s) - 1 8 d b c/i 3 rd a cs c/i 3 m hz (1 m bp s) - 1 9 d b table 6 el ec trical specifica ti ons wenshing confidential do not distribution p . 2 2 http://www.wenshing.com.tw;http://www.rf.net.tw 9 typical a pp licat io n schematic figure 8 TRW-24G2 ty pical a pplica ti on schematic wenshing confidential do not distribution |
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